In manufacturing of advanced semiconductor devices (both memory and logic) certain integration schemes require a selective removal of silicon nitride (SiN) layer from underlying silicon oxide pattern by chemical mechanical polishing (CMP). Such a process is commonly referred to as “reverse shallow trench isolation” (reverse STI) as opposed to the regular STI process in which silicon oxide is removed from the top of silicon nitride. The typical requirements of a reverse STI CMP slurry are high SiN removal rate and minimal loss of underlying silicon oxide.
Compositions and methods for CMP of the surface of a substrate are well known in the art. Polishing compositions (also known as polishing slurries, CMP slurries, and CMP compositions) for CMP of surfaces of semiconductor substrates (e.g., for integrated circuit manufacture) typically contain an abrasive, various additive compounds, and the like.
In conventional CMP techniques, a substrate carrier or polishing head is mounted on a carrier assembly and positioned in contact with a polishing pad in a CMP apparatus. The carrier assembly provides a controllable pressure to the substrate, urging the substrate against the polishing pad. The pad and carrier, with its attached substrate, are moved relative to one another. The relative movement of the pad and substrate serves to abrade the surface of the substrate to remove a portion of the material from the substrate surface, thereby polishing the substrate. The polishing of the substrate surface typically is further aided by the chemical activity of the polishing composition (e.g., by oxidizing agents, acids, bases, or other additives present in the CMP composition) and/or the mechanical activity of an abrasive suspended in the polishing composition. Typical abrasive materials include silicon dioxide, cerium oxide, aluminum oxide, zirconium oxide, and tin oxide.
All methods described previously using cationic abrasives at low pH have reported high selectivity for SiN removal when evaluated by polishing of separate blanket films (blanket wafers) of SiN and silicon oxide. In practice, however, these methods do not achieve the desired level of selectivity when polishing a patterned wafer containing both films, e.g., as in real-world semiconductor manufacture. The potential for obtaining different removal selectivity profiles for blanket wafer polishing versus pattern wafer polishing using the same CMP slurry is well known in the art. Consequently, there is an ongoing need for CMP compositions and methods that achieve true selective SiN removal on a patterned wafer. The invention described herein addresses this need by providing compositions and methods that exhibit selective removal of nitride relative to oxide when polishing a patterned wafer.